Dr Kok Chiang Liang
Lecturer (Electrical and Electronic Engineering)
College of Engineering, Science and Environment / School of Engineering
In 2010, Chiang Liang received his 1st Class Honours in Bachelor of Electrical & Electronic Engineering in Nanyang Technological University (NTU). In 2010, he received the prestigious Singapore Economic Development Board (EDB) Integrated Circuit Design PhD Scholarship to pursue his Doctor of Philosophy (PhD) in Nanyang Technological University (NTU). In 2014, he received his PhD Degree in Electrical & Electronic Engineering from NTU. His research thesis mainly focuses on power management unit (PMU) for smartphone applications, artificial intelligence sensors, robotics and energy harvesting applications. During the course of his PhD studies, he published several widely recognised journals and conference papers. Furthermore, he was invited to be the undergraduate tutor for analogue and integrated courses in NTU and also the teaching assistant for the prestigious NTU-TUM Master Degree course for 4 consecutive years from 2010 to 2014. In 2014, he joined Mindef DSO National Lab as a senior member of technical staff and implemented many projects on power management and crypto-electronics design. Furthermore, he was invited to be the Adjunct Teaching Professor for Electronic courses in Singapore University of Social Science (SUSS) from 2016 to 2020. In 2020, he was nominated for the prestigious Teaching Excellence Award in SUSS.
- PhD, Electrical & Electronic Engineering, NTU, Singapore
- Bachelor of EEE (Honours), NTU, Singapore
- Analog Circuit Design on Power Management Unit
- ASIC Design on Power Management Unit
- Artificial Intelligence
- Energy Harvesting Applications
|2011||Awarded Economic Development Board (EDB) Integrated Circuit Design PhD Scholarship|
|2015||C. L. Kok and L. Siek, "Unbalanced input pair zero current detector for DC–DC buck converter," in Electronics Letters, vol. 51, no. 17, pp. 1359-1361, 20 8 2015, doi: 10.1049/el.2015.0323.|
|2012||C. L. Kok, L. Siek, and W. M. Lim, "A Novel Ultra-low Power Two-Terminal Zener Voltage Reference," J. Circuit., Syst. Comp. 21, 1240017 (2012), doi: 10.1142/S0218126612400178.|
C. L. Kok, X. Li, L. Siek, D. Zhu and J. J. Kong, "A switched capacitor deadtime controller for DC-DC buck converter," 2015 IEEE International Symposium on Circuits and Systems (ISCAS), Lisbon, 2015, pp. 217-220, doi: 10.1109/ISCAS.2015.7168609.
C. Wu, W. L. Goh, C. L. Kok, W. Yang and L. Siek, "A low TC, supply independent and process compensated current reference," 2015 IEEE Custom Integrated Circuits Conference (CICC), San Jose, CA, 2015, pp. 1-4, doi: 10.1109/CICC.2015.7338488.
C. L. Kok, Q. Huang, D. Zhu, L. Siek and W. M. Lim, "A fully digital green LDO regulator dedicated for biomedical implant using a power-aware binary switching technique," 2012 IEEE Asia Pacific Conference on Circuits and Systems, Kaohsiung, 2012, pp. 5-8, doi: 10.1109/APCCAS.2012.6418957.
C. L. Kok, L. Siek and W. M. Lim, "An ultra-fast 65nm capacitorless LDO regulator dedicated for sensory detection using a direct feedback dual self-reacting loop technique," 2012 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT), Singapore, 2012, pp. 31-33, doi: 10.1109/RFIT.2012.6401604.
C. L. Kok, L. Siek, F. Gao, Y. Zheng and W. M. Lim, "An ultra-compact green bio-regulator dedicated for brain cortical implant using a dynamic PSR enhancement technique," 2012 Annual International Conference of the IEEE Engineering in Medicine and Biology Society, San Diego, CA, 2012, pp. 1647-1650, doi: 10.1109/EMBC.2012.6346262.
C. L. Kok and L. Siek, "A novel 2-terminal zener voltage reference," 2011 IEEE 54th International Midwest Symposium on Circuits and Systems (MWSCAS), Seoul, 2011, pp. 1-4, doi: 10.1109/MWSCAS.2011.6026364.
C. Wu, W. L. Goh, C. L. Kok et al., "Asymmetrical Dead-Time Control Driver for Buck Regulator," in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 24, no. 12, pp. 3543-3547, Dec. 2016, doi: 10.1109/TVLSI.2016.2551321.
J. Kong, L. Siek and C. L. Kok, "A 9-bit body-biased vernier ring time-to-digital converter in 65 nm CMOS technology," 2015 IEEE International Symposium on Circuits and Systems (ISCAS), Lisbon, 2015, pp. 1650-1653, doi: 10.1109/ISCAS.2015.7168967.
D. Zhu, J. Wang, C. L. Kok, L. Siek and Y. Zheng, "A new time-mode on-chip oscillator-based low power temperature sensor," 2015 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC), Singapore, 2015, pp. 411-414, doi: 10.1109/EDSSC.2015.7285138.
Z. Xiao, C. L. Kok and L. Siek, "Triple boundary multiphase with predictive interleaving technique for switched capacitor DC-DC converter regulation," 2014 International Symposium on Integrated Circuits (ISIC), Singapore, 2014, pp. 17-20, doi: 10.1109/ISICIR.2014.7029473.
D. Zhu, J. Wang, L. Siek, C. L. Kok, L. Qiu and Y. Zheng, "High accuracy time-mode duty-cycle-modulation-based temperature sensor for energy efficient system applications," 2014 International Symposium on Integrated Circuits (ISIC), Singapore, 2014, pp. 400-403, doi: 10.1109/ISICIR.2014.7029502.
X. Li, C. L. Kok et al., "A novel voltage reference with an improved folded cascode current mirror OpAmp dedicated for energy harvesting application," 2013 International SoC Design Conference (ISOCC), Busan, 2013, pp. 318-321, doi: 10.1109/ISOCC.2013.6864038.