Introduces students to the principles and practices of digital logic design using programmable logic devices and CAD tools. Topics include programmable logic devices and structures, design tools, VHDL hardware description language, datapath design, and control-unit design.
Availability2017 Course Timetables
- Trimester 3 - 2017 (Singapore)
- Semester 2 - 2017
On successful completion of the course students will be able to:
1. Use HDL and CAD tools to design digital circuits.
2. Design a single cycle MIPS processor.
3. Understand and design pipelined circuits and processors.
- Programmable Logic Devices
- Altera's design tools
- Computer Architecture and Performances
- MIPS Instruction Set Architecture
- Arithmetic for Computers
- The Processor: Datapath and Control
- Project involving the design of an embedded microcontroller
Formal Examination: Formal Examination
Callaghan and UoN Singapore
Face to Face On Campus 2 hour(s) per Week for Full Term
Face to Face On Campus 4 hour(s) per Week for Full Term
Students enrolled in the part-time evening program at UoN Singapore will receive equivalent instruction delivered in a block mode of 7 teaching weeks.